Intel’s Speed Select Technology (SST) is a power management solution that allows users to manage their core prioritization and frequency regulation to improve performance and efficiency. Intel had launched the SST back in 2019 and since then the technology proved itself to be versatile. However, the performance of the same has regressed by more than 10%. Although it does not impact workload much, it is still a matter of concern.
An Intel engineer explains that the standard Linux PCI interface is causing the delay as it searches through hundreds of PCI devices. Now that the cause of the problem has been discovered, the company has promised a simple patch that will possibly fix the glitch using the cached data. This patch will probably speed up the search process.
The Linux kernel mailing list officially contends, “It was observed that some of the high-performance benchmarks are spending more time in kernel depending on which CPU package they are executing. The difference is significant and benchmark scores varies more than 10%. These benchmarks adjust the class of service to improve thread performance which runs in parallel.
This class of service change causes access to the MMIO region of Intel Speed Select PCI devices depending on the CPU package they are executing. This mapping from CPU to PCI device instance uses a standard Linux PCI interface “pci_get_domain_bus_and_slot()”. This function does a linear search to get to a PCI device.
Since these platforms have 100+ PCI devices, this search can be expensive in a fast path for benchmarks. Since the device and function of the PCI devices are fixed for Intel Speed Select PCI devices, the CPU to PCI device information can be cached at the same time when the bus number for the CPU is read. In this way during runtime, the cached information can be used. This improves the performance of these benchmarks significantly.”
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